Recently, chip size packages have been widely used in order to miniaturize the chip size of solid-state image sensors.
Firstly, a solid-sate image sensor is described here. FIG. 10 is a plan view showing the construction of a solid-state image sensor.
A solid-state image sensor, in the case of a frame transfer type for example, is essentially composed of a light receiving section 200, a storage section 202, a horizontal transfer section 204, an output section 206 and an output amplifier 208. The light receiving section 200 has a plurality of light receiving pixels arranged in a matrix, and stores information charges, which are generated in response to receiving light, in each respective light receiving pixel. The storage section 202 has a plurality of storage pixels arranged according to the number of light receiving pixels of the light receiving section 200, and takes in and temporarily stores information charges of one image stored in the light receiving section 200. The horizontal transfer section 204 takes in information charges from the storage section 202 in units of one line, and transfers them horizontally one pixel at a time. The output section 206 converts the information charges transferred from the horizontal transfer section 204 to voltage value and outputs them in units of one pixel. The output amplifier 208 amplifies the voltage value outputted from the output section 206, and outputs it as an image signal.
A solid-state image sensor having such a construction has a diffusion layer on the semiconductor substrate surface and electrodes arranged on the substrate, and comprises the light receiving section 200, the storage section 202, the horizontal transfer section 204, the output section 206 and the output amplifier 208, and lastly has a light-shielding film, which blocks light, arranged in all areas except for the light receiving section 200 (the hatched area in the diagram).
Next, a semiconductor integrated device in which a chip-sized package is applied for the solid-state image sensor is described. FIG. 11 is a cross-sectional view of the semiconductor integrated device cut along a position corresponding to the line X-X in FIG. 10.
A P-type diffusion layer 302 is formed on the surface of an N-type semiconductor substrate 300, and an N-type diffusion layer 304 is formed in this P-type diffusion layer 302. Highly concentrated P-type impurities are implanted in places in the N-type diffusion layer 304, and a channel stopper (not shown) is formed. Then, a transfer electrode 306 is formed on the semiconductor substrate 300 having an insulation film 305 in between, and the solid-state image sensor is formed.
An insulation film 308 is laminated on the transfer electrode 306, and a voltage supply line 310 and a pad electrode 322 are formed on this insulation film 308. This voltage supply line 310 and pad electrode 322 are electrically connected to the transfer electrode 306 via a contact formed in the insulation film 308. Moreover, an insulation film 312 is laminated on the voltage supply line 310 and the pad electrode, and an internal wiring 314 is formed on the insulation film 312. This internal wiring 314 is, on its cross-sectional surface, connected to an external wiring 110 arranged along the side face of the package. An insulation film 316 is laminated on the internal wiring 314, and a light-shielding film 318 is arranged in the area covering the storage section 202, the horizontal transfer section 204 and the output section 206 on this insulation film 316. Then, a surface protection film 320, covering the light-shielding film 318 and the insulation film 316, is formed.